Designing low-power hardware for high-precision cellular localization using attention-based machine learning algorithms

Sammanfattning

This thesis investigates the feasibility and performance of implementing attention-based machine learning models for high-precision cellular localization on low-power hardware. While such models, particularly those using the self-attention mechanism, have demonstrated impressive accuracy in extracting spatial information from wireless signals, they typically rely on GPU acceleration, limiting their applicability in embedded and mobile environments due to power and resource constraints. To address this challenge, a quantized version of a self-attention model was developed and deployed on an FPGA using VHDL. The study explores multiple quantization strategies to reduce data and weight precision to 8-bit and 4-bit formats. Computationally intensive operations such as softmax are evaluated and a modified sigmoid activation function suitable for hardware use is introduced. A modular hardware architecture was designed and validated through functional simulation and comparison with a Python-based reference model. Experimental results show that the hardware implementation achieved comparable accuracy to the original model, with a mean localization error increase of only 0.04m when using 8-bit quantization. Furthermore, the FPGA design consumed over six times less energy than a conventional CPU, demonstrating the significant potential of reconfigurable hardware for power-efficient, real-time AI inference. This work highlights the viability of deploying transformer-inspired models in resource-constrained systems and contributes to the broader field of hardware-aware machine learning. The methods and insights presented serve as a foundation for future research in low-power, high-accuracy localization and embedded AI acceleration.