Optimizing a superconducting transistor to minimize parasitic capacitance and maximize electron mobility

Sammanfattning

The scaling of high-mobility and superconducting transistors places strict demands on electrostatic control, making the gate capacitance a key factor for both performance and operational stability. In hybrid structures that combine semiconductors and superconductors, parasitic capacitances become particularly important, as fringing fields and heterogeneous material interfaces cause the total capacitance to deviate from ideal models. The relationship between capacitance and geometric and dielectric parameters is therefore an active area of research. This work investigates how variations in gate length, dielectric width, oxide thickness and dielectric permittivity affect the total gate capacitance in a superconducting quantum-well field-effect-transistor (QWFET). A two-dimensional electrostatic COMSOL model is used to extract both intrinsic and parasitic capacitance components through a frequency-domain perturbation analysis. A separate one-dimensional Schrödinger-Poisson model is used to describe quantum confinement and to compute the electron mobility. The results show that the capacitance increases almost linearly with gate length, with deviations at short lengths where fringing fields dominate. A wider dielectric reduces the capacitance by weakening the lateral electrostatic coupling, while the oxide thickness exhibits a non-monotonic behavior: the capacitance increases initially due to enhanced fringing-fields spreading, but decreases again at larger thicknesses due to a weakened gate coupling. Increasing the dielectric permittivity raises the overall capacitance level while leaving its scaling with gate length essentially unchanged. Linear extrapolation of the capacitance-gate length relation enables extraction of the parasitic capacitance, which decreases slightly with increasing dielectric width. Oxide thickness shows no clear trend in the extracted parasitic capacitance, while increasing dielectric permittivity leads to a pronounced rise in the parasitic contribution. The Schrödinger–Poisson model shows strong electron confinement in the quantum well and confirms that impurity scattering is the dominant mechanism affecting the mobility under the studied conditions. Mobility decreases with increasing impurity concentration and reflects the spatial overlap between the confined wavefunction and the doped regions. These results highlight a trade-off between strong electrostatic gate control and high mobility, arising from the opposing requirements on confinement and scattering.