Explore the hardware synthesis accelerated by the open-source high-level synthesis tool, XLS

Sammanfattning

High-level Synthesis (HLS) tools have become increasingly important in digital hardware design. They enable developers to generate hardware from high-level programming languages. Aside from powerful and widely used commercial HLS tools, such as Catapult HLS and Simulink HDL Toolbox, some open-source HLS tools shine in practical applications. For example, a relatively new and rapidly evolving open-source HLS tool, XLS, is drawing attention. This thesis examines the capabilities of XLS by comparing its performance and ease of use with those of two established commercial tools mentioned above. The comparison focuses on a set of small yet challenging DSP Digital Signal Processing applications and targets FPGA platforms. Key evaluation metrics include timing performance, latency, and resource utilization. To ensure a fair and insightful comparison, the same applications were implemented by all three tools. Some of the system parameters are scaled to observe their impact on the resulting designs, which reflects the performance of the tools. In addition to performance analysis, the ease of use of each tool was qualitatively assessed based on the developers’ experience and the tool’s support. The results show that commercial tools, particularly Catapult HLS, continue to outperform in terms of overall stability. Simulink HDL Toolbox also shows satisfactory results in specific scenarios. Although XLS lags in performance, it shows promise in resource optimization and could become more competitive as it matures. The findings of this study provide a foundational benchmark for future evaluations of XLS, and the methodology of this study can be applied to evaluate other HLS tools in the DSP domain.