Implementing Spiking Neural Networks on NPU-Equipped Microcontroller : Analysis of NPU Acceleration for Embedded AI Systems

Sammanfattning

Neural networks, a core branch of machine learning, seek to emulate aspects of human brain function through computational models. Since McCulloch and Pitts introduced the first formal neuron model in 1943 and Rosenblatt's Perceptron debuted in 1958, architectures have steadily evolved, driven both by insights from neuroscience and by rapid advances in computing technology. Spiking Neural Network (SNN)s, which emulate the event-driven signalling mechanisms of biological neurons, offer significant computational throughput while maintaining low energy consumption. Concurrently, dedicated AI accelerators such as Neural Processing Unit (NPU)s have been developed to execute repetitive AI-tasks more efficiently than general-purpose Central Processing Unit (CPU)s and even Graphics Processing Unit (GPU)s. The aim of this thesis is to investigate the feasibility of implementing a SNN on an embedded Micro Controller Unit (MCU) with an integrated NPU, in order to improve inference performance and reduce power consumption compared to running the model solely on a CPU. This thesis demonstrates that a Leaky Integrate-and-Fire (LIF) SNN can be implemented on the STM32N657X0 MCU, leveraging its integrated NPU. The SNN was developed using TensorFlow Lite and the supported operators of the ST Neural-ART NPU, enabling the model to be quantized and deployed via the STEdgeAI toolchain developed by STMicroelectronics. Power consumption measurements of the SNN running on both the NPU and the Cortex-M55 CPU demonstrate that the NPU performs significantly better in terms of efficiency. These results prove that the SNN model can be successfully deployed on embedded hardware while simultaneously achieving greater efficiency than its CPU counterpart.